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Course Information

Course Name
Turkish Lojik Tasarıma Giriş
English Introduction to Logic Design
Course Code
EEF 205 Credit Lecture
(hour/week)
Recitation
(hour/week)
Laboratory
(hour/week)
Semester -
- 3 - -
Course Language Turkish
Course Coordinator Sıddıka Berna Örs Yalçın
Course Objectives 1. Teaching Analysis and Design of Combinational Circuits
2. Teaching Analysis and Design of Synchronous Sequential Logic
3. Teaching Hardware Description Languages
Course Description Digital Systems and Binary Numbers. Axiomatic definition of Boolean Algebra. Boolean functions. Minimization. Digital Logic Gates. Hardware Description Languages (HDL). Analysis and Design of Combinational Circuits. Combinational Circuit design examples with HDL. Boolean Function Implementation with MSI. HDL Model of Boolean Functions by MSI elements. Storage Elements: latches, Flip-Flops, HDL Model of SR and D Latches, Analysis and Design of Synchronous Sequential Circuits, HDL Model of Finite State Machine.
Course Outcomes Upon successful completion of the course, students will be able to:
I. Understand of difference between Digital and Analog Systems, understand number systems
II. Understand Boolean Algebra and Boolean Functions
III. Minimize of Boolean Functions
IV. Design Combinational Circuits by Using Gates in Two Levels
V. Implement of Boolean Functions with MSI elements
VI. Analyze and Design Synchronous Sequential Circuits
VII. Model Combinational and Synchronous Sequential Circuits by Using HDLs
Pre-requisite(s) -
Required Facilities Computer
Other
Textbook M. M. Mano, M. D. Ciletti, “Digital Design”, (4th Edition) Prentice Hall, 2006
Other References Diğer Kaynaklar
(Other References) F. Vahid, “Digital design, with RTL design, VHDL, and Verilog”, J. Wiley & Sons, 2010.
P. D. Minns, “FSM-based digital design using Verilog HDL”, J. Wiley & Sons, 2008.
P. P. Chu, “FPGA prototyping by Verilog examples Xilinx Spartan-3 version”, J. Wiley & Sons, 2008.
B. Readler, “Verilog by Example: A Concise Introduction for FPGA Design”, Full Arc Press, 2011
 
 
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